This design would not be possible without Ken Shirriff who reverse-engineered some major portions of Z80 from the picture of a die. These are the portions of the A-Z80 design that are based on his work:
In the first post I described the sequencer, a circuit that provided discrete timing signals to space operations apart. In the second post I mentioned the Timing matrix that was run by these signals and orchestrated a dance of control signals in time.
This article is about making it all alive and kicking within an FPGA solution.
...continue reading "A Z80 : The Soul"
In the last article I described the sequencer, which is the heart of a CPU, and a few other blocks that perform various tasks. But how is it all orchestrated to perform useful work?
Enter the PLA and the Timing matrix - the mind of a CPU.
...continue reading "A Z80 : The Mind"
Click on any image to open a higher-resolution version.
This is how it all works.
The sequencer is "the heart" of a CPU. It gets the external clock which in turn toggles two rows of flip-flops that generate machine cycles (M-cycles) and clock periods (T-states).
...continue reading "A Z80 : The Heart"
A-Z80 is a conceptual implementation of the venerable Zilog Z80 processor targeted to synthesize and run on a modern FPGA device. It differs from the existing (mostly Verilog) Z80 implementations in that it is designed from the ground-up through the schematics and low-level gates.
...continue reading "A Z80 From the Ground Up"
Data bus on the Z80 processor is 8 bits wide. Data bus wires carrying information within the chip itself do not simply connect to package pins and out to the world - the gate circuitry of each bit is quite complex. This article presents a transistor level schematic of a data bit’s gate which I reverse-engineered from a die photograph.
...continue reading "The Anatomy of a Z80 Gate"
After reading excellent Ken Shirriff's blog on reverse-engineering parts of the Z80 CPU, I decided to learn how to decipher some of the chip die-shots myself. It turns out not to be that difficult if you follow certain guidance which I will describe in this post.
...continue reading "Z80 Instruction Register deciphered"
Here I show a trace of every single Z80 instruction as run by that setup. I also outlined some of the tests created manually that clarified few situations which were not too obvious (to me) after reading various pieces of documentation.
If you want to find out exactly what a venerable Z80 is doing on its bus while executing instructions, in this post I outlined a dongle and the software that will let you see that. Using just a few components and connecting them to an Arduino Mega, you can trace instructions clock by clock and observe what's happening on the bus.
...continue reading "Arduino and ZiLOG Z80"
This article is about using an Altera FPGA board to generate image on a VGA monitor.
...continue reading "A Poem by FPGA"