Month: September 2014

This design would not be possible without Ken Shirriff who reverse-engineered some major portions of Z80 from the picture of a die. These are the portions of the A-Z80 design that are based on his work:

...continue reading "A Z80 : References"

In the first post I described the sequencer, a circuit that provided discrete timing signals to space operations apart. In the second post I mentioned the Timing matrix that was run by these signals and orchestrated a dance of control signals in time.

This article is about making it all alive and kicking within an FPGA solution.
...continue reading "A Z80 : The Soul"

In the last article I described the sequencer, which is the heart of a CPU, and a few other blocks that perform various tasks. But how is it all orchestrated to perform useful work?

Enter the PLA and the Timing matrix - the mind of a CPU.
...continue reading "A Z80 : The Mind"

Click on any image to open a higher-resolution version.

This is how it all works.

The sequencer is "the heart" of a CPU. It gets the external clock which in turn toggles two rows of flip-flops that generate machine cycles (M-cycles) and clock periods (T-states).
...continue reading "A Z80 : The Heart"