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This article contains a brief overview and a background of the A-Z80 CPU created for FPGA boards and a ZX Spectrum implementation tied to it.

(You can find the Russian translation of this article here: https://howtorecover.me/z80-s-nulya)

...continue reading "The A-Z80 CPU"

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The data bus on the Z80 processor is 8 bits wide. Data bus wires carrying information within the chip itself do not simply connect to package pins and out to the world - the gate circuitry of each bit is quite complex. This article presents a transistor-level schematic of a data bit’s gate which I reverse-engineered from a die photograph.

Data pins (D0-D7) carry arguably the most complex signals on the Z80 since they are both bi-directional and capable of tri-stating. They are located around the +5V pin – four of them on each side. This is a microphotograph of a gate of one of the data pins which we will look at more closely today – a pin for a data line D6.

...continue reading "The Anatomy of a Z80 Gate"