Posts related to Zilog Z80 CPU.
Z80 Explorer is a visual netlist-level simulator for the Zilog Z80 microprocessor. You can read more about it in my main blog article. This release adds some features and improvements I felt were missing as I deep-dived into the chip’s functioning.
Continue readingZ80 Explorer is a Zilog Z80 netlist-level simulator capable of running Z80 machine code and also an educational tool with features that help reverse engineer and understand this chip better.
Continue readingThis article contains a brief overview and a background of the A-Z80 CPU created for FPGA boards and a ZX Spectrum implementation tied to it.
(You can find the Russian translation of this article here: https://howtorecover.me/z80-s-nulya)
In the last article, I presented a different way of architecturally modeling a Zilog Z80 processor. It is time to do something really useful with it and what could be better than reliving the past for a moment? Let’s recreate an old computer and load in and play some games!
Sinclair ZX Spectrum was my second computer, the first one being ZX81. As I was growing up in Croatia, I had a good friend whose brother, living in Germany, regularly sent him tapes with new games. Through this steady stream of games I’ve probably seen most of them (thank you, Krešo!) However, although I could, I had never played them through. Instead, I would load in DevPac – a debugger – and disassemble them trying to decipher how they were made and occasionally find some pokes for infinite lives.
This is a list of some hard-to-find publications on the Z80 CPU.
This design would not be possible without Ken Shirriff who reverse-engineered some major portions of Z80 from the picture of a die. These are the portions of the A-Z80 design that are based on his work:
Continue readingIn the first post, I described the sequencer, a circuit that provided discrete timing signals to space operations apart. In the second post, I mentioned the Timing matrix that was run by these signals and orchestrated the dance of control signals in time.
This article is about making it all alive and kicking within an FPGA solution.
In the last article, I described the sequencer, which is the heart of a CPU, and a few other blocks that perform various tasks. But how is it all orchestrated to perform useful work?
Enter the PLA and the Timing matrix – the mind of a CPU.
Click on any image to open a higher-resolution version.
This is how it all works.
The sequencer is “the heart” of a CPU. It gets the external clock which in turn toggles two rows of flip-flops that generate machine cycles (M-cycles) and clock periods (T-states).
A-Z80 is a conceptual implementation of the venerable Zilog Z80 processor targeted to synthesize and run on a modern FPGA device. It differs from the existing (mostly Verilog) Z80 implementations in that it is designed from the ground up through the schematics and low-level gates.
